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HW Accelerated Blockchain Explorer

Version: 0.6
Date: 15 September 2017
Name: RFC-HWAPPLIC-5
Author: Michael Schloh von Bennewitz
Contact: [email protected]
IRC-contacts: msvb-lab, msvb-mob
Title: HW Accelerated Blockchain Explorer
Location: https://forum.getmonero.org/6/ideas/88449/hw-accelerated-blockchain-explorer/

This document is unstable until reaching version 1.0.

Concept

A half-length full-height PCI card sized circuit board integrating MCU, CPU, FPGA, and cryptoaccelerated ICs serves an intermediate or advanced Monero user when traversing blockchain transactions. The board may integrate with a Optane or similar SSD for dynamic memory and storage to optimize for a given transaction operation.

Novelty

This design uses no Application specific integrated circuits (ASIC) typical in mining hardware interfaces. All peripherals are available over the counter and all components ship with datasheets.

TO BE DETAILED

This is a placeholder FFS for a proposal to be written once other RFC-HWALLET-X proposals are considered.

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